Interference in Multiprocessor Computer Systems with Interleaved Memory

This paper analyzes the memory interference
caused by several processors simultaneously using 
several memory modules.  Exect results are computed for
a simple model of such a system.   The limiting 
value is derived for the relative degree of memory interference
as the system size increases.  The model 
of the limiting behavior of the system yields approximate
results for the simple model and also suggests 
that the results are valid for a much larger class of models,
including those more nearly like real systems 
that the simple model are tested against some measurements
of program behavior and simulations of systems 
using memory references from real programs.  The model
results provide a good indication of the performance 
that should be expected from real system of this type.

CACM June, 1976

Baskett, F.
Smith, A. J.

memory, memory interference, multiprocessing,
interleaved memory, trace driven simulation

4.32 6.21 6.34 8.1

CA760603 JB January 4, 1978  2:19 PM

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